Blog
Mert Özen's blog posts on software development, backend, frontend, and DevOps.
The .NET Memory Model: Happens-Before, Acquire/Release, volatile and Safe Object Publication
In the .NET memory model ordinary accesses may be reordered; Volatile.Read is an acquire, Volatile.Write a release, and Interlocked and lock are the points that guarantee order. We show a non-volatile stop flag loop never stopping in a Release build because of the JIT, double-checked locking with a bool flag returning null 36 times in 20 million calls on ARM64, derive from the spec why checking the reference is correct, and compare with Java, C++ and Go.
Hardware Memory Models: Reordering, Store Buffers, Cache Coherence and Sequential Consistency
Modern CPUs do not give sequential consistency: the store buffer lets a read overtake an earlier write, and ARM64 reorders even more. On ARM64 we measure both threads reading 0 in 5.3 million of 10 million rounds of the classic store buffering test and a flag becoming visible before the data in the message passing test, explain why cache coherence does not prevent this, and show from Intel's manual which outcomes x64 forbids.
Mutual Exclusion Theory: Critical Sections, Peterson's Algorithm, Semaphores and Monitors
A correct critical section solution must provide mutual exclusion, progress and bounded waiting together; Peterson's algorithm does this with only reads and writes but assumes sequential consistency. We show Peterson written with volatile breaking 99 times in 40 million entries on ARM64 and fixed by a full fence, waiting with if producing 54,234 errors in a shipping queue, and where test-and-set, semaphores and monitors come from.